| Title: |
Ultrathin silicon wafer bonding physics and applications
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| Author: | |
| Document Type: |
Dissertation
|
| Department: |
Federated Physics Department of NJIT and Rutgers-Newark
|
| Degree: |
Doctor of Philosophy
|
| Major: |
Applied Physics
|
| Advisory Committee: |
Farmer, Kenneth Rudolph
Digges, Thomas G.
Shaw, Earl David
Ivanov, Dentcho V.
Chin, Ken K.
Federici, John Francis
Tyson, Trevor
|
| Thesis Date: |
2001, May
|
| Keywords: |
Ultrathin Silicon Wafer Bonding
Manufacture Of Microelectomechanical Systems (MEMS)
Devices
Power Spectral Density (PSD)
|
| Availability: |
Unrestricted
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| Abstract: |
Ultrathin silicon wafer bonding is an emerging process that simplifies device fabrication, reduces manufacturing costs, increases yield, and allows the realization of novel devices. Ultrathin silicon wafers are between 3 and 200 microns thick with all the same properties of the thicker silicon wafers (greater than 300 microns) normally used by the semiconductor electronics industry. Wafer bonding is one technique by which multiple layers are formed. In this thesis, the history and practice of wafer bonding is described and applied to the manufacture of microelectomechanical systems (MEMS) devices with layer thickness on the scale of microns. Handling and processing problems specific to ultrathin silicon wafers and their bonding are addressed and solved. A model that predicts the conformal nature of these flexible silicon wafers and its impact on bonding is developed in terms of a relatively new description of surface quality, the Power Spectral Density (PSD). A process for reducing surface roughness of silicon is elucidated and a model of this process is described. A method of detecting particle contamination in chemical baths and other processes using wafer bonding is detailed. A final section highlights some recent work that has used ultrathin silicon wafer bonding to fabricate MEMS devices that have reduced existing design complexity and made possible novel, and otherwise difficult to produce, sensors. A new fabrication process that can reduce the required time for "proof-of-principle" devices using ultrathin silicon wafers is also described. |
| Complete Thesis: |
njit-etd2001-065
(170 pages ~ 11,069 KB pdf)
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Created June 04, 2002
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