A very important factor in the reliability of MOS devices is the stability of the threshold voltage. This dissertation examines the effects of positive and negative gate bias stresses at elevated temperatures on the drift in the threshold voltage of MOS field effect transistors.

Over 400 p-channel enhancement mode devices were life tested under different temperature and gate bias conditions for periods of up to 15,000 hours, and the drift in their threshold voltages studied and analyzed. It was found that under both negative and positive bias-temperature tests, the threshold voltage drifted towards more negative values, though in the negative bias tests, the drift in the first few tens or hundreds of hours was in the opposite direction.

The effect of positive bias is easily explained in terms of impurity ion migration effects. To explain the effect of negative bias, two competing mechanisms, namely, impurity ion migration and the silicon ion effects, are postulated by the author; and a logical theoretical explanation is developed to explain the results of the experimental investigation.